Over the past several decades, in order to meet consumer demand, the semiconductor industry has pursued increased density and enhanced performance of integrated circuits, such as memory devices and microprocessors. As critical dimensions of semiconductor devices continue to decrease, one of many challenges facing the industry has been the fabrication of devices, such as transistors, with highly activated or doped and/or ultra shallow regions. However, techniques to achieve such regions have not scaled well at the required critical dimensions, leading to degraded device performance.